Fabrication of an integrated circuit involves processes that can generally be categorized as deposition, patterning, and doping. With the use of these different processes complex structures having various components may be built to form the complex circuitry of a semiconductor device.
Lithography is the formation of a three-dimensional patterning on a substrate to form a pattern to the substrate. A multiplicity of lithographic procedures combined with etching and/or polishing may be performed to create a final semiconductor device.
Photolithography or optical lithography involves the use of a light sensitive polymer or a photoresist that is exposed and developed to form three-dimensional patterning on a substrate. The parts of the substrate that remain covered with the photoresist will be protected from subsequent etching, ion implantation, or certain other processing techniques.
The general sequence for a photolithography process may include the steps of preparing the substrate, applying a photoresist, prebaking, exposing, post-exposure baking, developing, and post-baking. Photoresists may be applied to the substrate by any number of techniques. Generally, it is somewhat important to establish a uniform thickness of the photoresist across the substrate. Optionally, a layer of bottom anti reflectivity coating (BARC) may be applied to the substrate prior to the application of the photoresist layer. Adhesion promoters may be typically applied to the substrate prior to application of the photoresist.
The premise behind photolithography is the change in solubility of the positive photoresist in a positive tone developer throughout certain regions of the photoresist that have been exposed to light, in the past visible light but more conventionally ultraviolet light, or some other form of radiation. The regions of exposure may be controlled, for example, with the use of a mask.
Applicant has identified deficiencies and problems associated with conventional processes for manufacturing memory devices and the resulting memory devices. For instance, in conventional manufacturing processes, the array and periphery regions must be formed separately using separate patterning steps. The resulting process is both time consuming and costly.
Through applied effort, ingenuity, and innovation, certain of these identified problems have been solved by developing solutions that are included in various embodiments of the present invention, which are described in detail below.